I have to code a VHDL skrypt that display diods like snake. We have 16 diods that have to create have to display 2 diods per 50_000_000 cycles.
the model that we work with is Altera 10 MAX10M50DAF484C7G. Manual – MAX10M50DAF484C7G

I tried this code and I dont know how to add clock to ityour text

use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity snake2 is
    Port (
        clk : in STD_LOGIC;
        rst : in STD_LOGIC;
        LED : out STD_LOGIC_VECTOR (15
    downto 0)
    );
end snake2;

architecture Behavioral of snake2 is
    signal snake_head_pos : integer range 0
    to 15 := 0;    --3 sygnaly ktore poakzuja weza--
    signal direction: integer := 1;
    signal snake : STD_LOGIC_VECTOR (15
downto 0) := (others => '0');
begin
    process(clk, rst)
    begin
        if rst = '1' then --jesli restart = 1--
            snake_head_pos <= 0; --waz wraca do 0--
            direction <= 1; --kierunek wraca do 1--
            snake <= (others => '0'); --wraca do wektora ktory zawiera same zera--
        elsif rising_edge(clk) then --jesli clk idzie z np. high to low--
            if snake_head_pos = 0 and
                direction = -1 then 
                direction <= 1; --waz idzie w prawo--
            elsif snake_head_pos = 15 and
                direction = 1 then 
                direction <= -1; --Waz idzie w lewo--
            else
                snake_head_pos <= snake_head_pos + direction; --pozycja Weza jest updatowana poprzez dodawianie 
            end if;

            snake <= (others => '0'); --wszystkie bity weza = 0--
            snake(snake_head_pos) <= '1'; --ustawia bity korespadujace z Wezem do 1--
        end if;
    end process;

    LED <= snake;

end Behavioral;  ```