I have an Ettus E310, and I used UHD 3.14 to create a custom FPGA image containing the Window, FFT, and LogPwr RFNoC blocks. In that version, I used uhd_image_builder.py like so:

source ~/rfnoc/src/uhd/fpga-src/usrp3/top/e300/setupenv.sh
cd ~/rfnoc/src/uhd/fpga-src/usrp3/tools/scripts
./uhd_image_builder.py fft window logpwr
-t E310_RFNOC_sg3 -d E310 -m 5 --fill-with-fifos

I then connected the blocks together in my C++ app using uhd::rfnoc::graph::connect(). Everything works great.

Now, I’m trying to migrate to UHD 4.7. I’m trying to create an FPGA image that includes the same blocks.

I noticed that uhd_image_builder.py is has been replaced by rfnoc_image_builder. Instead of simply listing the blocks to include on the command line, I must edit a .yaml file and add the desired blocks to the noc_blocks section and wire them all together. I’m new to this, and I have no idea how to wire them all together.

Is there any way to just specify which blocks to include, then worry about connecting them later at runtime via uhd::rfnoc::graph::connect()?

And, yes, I did read https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0#RFNoC_Image_Builder, and it provides a nice concrete example, but it doesn’t explain what’s happening to a level that would enable me to create an FPGA image containing the Window, FFT, and LogPwr RFNoC blocks.

Can anyone enlighten me, or point me to a resource that explains FPGA custom images in UHD 4.x?