GNU Make 3.80 on Windows 11

I have Makefiles for several custom domain specific languages. One of them require weird paths for the input/output files passed to the compiler, So I had to use some gnumake tricks. Now they are not playing nice with variable overloading, even using the always-re-parse-variable (=).

How to write an implicit rule to cover all sources in a sub directory with more sub directories and build objects in the current directory? Here is an example:

I have a small snippet to replace kvvm60 to main in a directory path where it’s not working as expected.

I’m trying to define a make rule that modifies a make variable, as a way to conditionally compile the code.
Something like:

I’m trying to define a make rule that modifies a make variable, as a way to conditionally compile the code.
Something like:

I’m writing a makefile.

I’m writing a makefile.

I’d like to display a progress bar during building with GNU make. It works great for clean builds, but it’s inaccurate for incremental builds.

I am facing fatal error C1060: compiler is out of heap space issue on Windows OS while compiling specific .c files in my project. Those .c files are huge and they eat memory when i run the build in -j%NUMBER_OF_PROCESSORS% which will consume all available cpu cores (i.e 20) and results to memory issues. I try to reduce no of cores to -j10, But still i face heap space issues intermittently.