Having dealt with Chisel code, projects and tests, both in the past, I thought this will go easier; however, I am having trouble with aligning myself with the train of thought behind the chiseltests that are present in Chisel 5.0.0.

There is a reason why I am stuck with 5.0.0 and can’t move to 6.5.0 right now – having said that, here’s what I have:

1. installed Chisel local from this commit
2. got appropriate version for firrtool (1.38.0) as instructed here <== I’ve got Ubuntu running, with all the other dependencies
3. installed verilator, version 4.226, as recommended in the same link with setup instructions
4. got the chisel-template – this exact commit, as it corresponds to Chisel 5.0.0

Earlier, I mean back in Chisel 3, we used to have all the backend names all that, we could’ve run --backend-name verilator or something similar (here’s an example of a question from those days), but now there is only tihs GCDSpec.scala thing where it says only this:

/**
  * This is a trivial example of how to run this Specification
  * From within sbt use:
  * {{{
  * testOnly gcd.GcdDecoupledTester
  * }}}
  * From a terminal shell use:
  * {{{
  * sbt 'testOnly gcd.GcdDecoupledTester'
  * }}}
  */

That doesn’t really do anything, so I found in the latest chisel-template (remember, the commit above corresponds Chisel 5.0.0) additional lineс:

/**
  * This is a trivial example of how to run this Specification
  * From within sbt use:
  * {{{
  * testOnly gcd.GCDSpec
  * }}}
  * From a terminal shell use:
  * {{{
  * sbt 'testOnly gcd.GCDSpec'
  * }}}
  * Testing from mill:
  * {{{
  * mill %NAME%.test.testOnly gcd.GCDSpec
  * }}}
  */

So using sbt 'testOnly gcd.GCDSpec' I do get a “Success” printed <== but there is no possibility to get a verilog file… That I managed by adding this piece:

}
object GCDMain extends App{     
  emitVerilog (new GCD, Array("--target-dir","generated/gcd")) 
}

to the src/main/scala/gcd/GCD.scala <== I found that somewhere online, I am unable to retrace the source… Please, somebody, add the resource if you know. Now, verilog is obtained with sbt run.

Still, though, how we can run this in verilator and obtain waveform?

All I was able to dig out is this GCDTest.scala from chiseltest repo, but after a few fruitless attempts to tie it together with what I have in my chisel-template I am getting nowhere… I succeeded to introduce GCDTest.scala in my repo, by replacing the lines 1-4 in the GCDTest.scala from that link to:

package gcd

import treadle2.chronometry.Timer
import chiseltest._
import chiseltest.iotesters._

However, doing anything in sbt cli with --backend-name verilator doesn’t produce anything additional – no binary, no vcd, nothing.