I’m a bit of a noob in Make and wrote a makefile which essentially parses my src folder looking for .c files and creates a .so file out of them. I then parse my user folder searching for .c files and making a .so file per .c file.

MAKEFLAGS += -j$(shell nproc)

USR_DIR = ./user
USRS = $(USR_DIR)/*.c
SRCS = ./src/*.c

.PHONY: all clean

all: libmain.so $(USRS:.c=.so)

libmain.so:
    gcc -I./include -fPIC -shared -o libmain.so $(SRCS)
    @touch $@

$(USR_DIR)/%.so: $(USR_DIR)/%.c libmain.so
    gcc -I./include -shared -o $@ -fPIC $< -L. -lmain -Wl,-rpath,.

clean:
    rm -f main $(USR_DIR)/*.o $(USR_DIR)/*.so libmain.so

The problem is that even with the parallelism optimisation I tried to make at the beginning, this takes quite a while to run, especially if there’s a lot of files this needs to be done with. Is there any way I can optimise the compilation process?