I am a total noob when it comes to makefile and want to improve my skills, and therefore Im here to learn from you. I have a small project with several files. There is one main file, with a header and two additional source and header files with definition and declaration seperated.

So far so good. Yesterday I tried to include an additional header + source file, however when I tried to call the function of the new file in my existing main file, I got an undefined reference error. Right now I am totally clueless why this happened and how to fix it. Furthermore, a neat little feature of my makefile is, that for any change(whether in one file or more) it compiles everything…

Thus, I would higly appreciate if someone could help me. Here is the code:

CC = gcc
CFLAGS = -std=c99 -Wextra -Wall -g
LIBS = -pthread  -L/usr/lib/x86_64-linux-gnu/ -lssl -lcrypto -I/opt/openssl/include 
BUILDDIR = ./bin

OBJECTS = $(patsubst %.c, $(BUILDDIR)/%.o, $(wildcard *.c))
HEADERS = $(wildcard *.h)

TARGET = myserver

default: $(BUILDDIR)/$(OBJECTS) $(BUILDDIR)/$(TARGET)


$(BUILDDIR)/%.o: %.c $(HEADERS)
    $(CC) -c $< -o $@ $(CFLAGS)

.PRECIOUS: $(TARGET) $(OBJECTS)

$(BUILDDIR)/$(TARGET): $(OBJECTS)
    $(CC) $(OBJECTS) -o $@ $(CFLAGS) $(LIBS)


.PHONY: clean
clean:
    @echo "Delete all object files and the executable in the build dir..."
    rm -f $(BUILDDIR)/*.o 
    rm -f $(BUILDDIR)/$(TARGET)
    rm -f $(BUILDDIR)/*.gch`

Currently Im searching in the internet for a nice template.