Based on this article, Intel’s CPUs starting with Skylake have combined the Cache Agent (CA) and Home Agent (HA) into a single Cache Home Agent (CHA), with each LLC slice having its own CHA. What was the purpose of this merger? What advantages does the combined CHA have over separate CA and HA?
As in this article, the combined CHA can provide both CA and HA capabilities simultaneously.
The LLC coherence engine and Home agent (CHA) merges the caching agent and home agent (HA) responsibilities of the chip into a single block. In its capacity as a caching agent the CHA manages the interface between the core the IIO devices and the last level cache (LLC). In its capacity as a home agent the CHA manages the interface between the LLC and the rest of the UPI coherent fabric as well as the on die memory controller.
Based on this answer, if there is a cache miss, the CHA will first determine the corresponding CHA based on the memory address and hash algorithm, and access the memory through this CHA.
Can I assume that the memory access process is as follows:
- core-0 get a local L2 miss
- hashes the memory address to get the corresponding CHA-2
- accesses the L3 slice of CHA-2
- if the L3 also misses, performs another hash to get the corresponding memory channel IMC-4
- CHA-2 access the IMC-4, store data in its L3 slice
- CHA-2 pass data to core-0
Or does core-0 has to access the local CHA-0 first after the local L2 miss?