I’m writing a new memory dependence predictor for the Gem5 O3 CPU. Currently the memory dependencies it sets is somehow causing a load instruction to fail this assertion when it’s packets are sent to cache:

gem5.opt: src/cpu/o3/lsq.cc:1331: virtual void gem5::o3::LSQ::SingleDataRequest::sendPacketToCache(): Assertion '_numOutstandingPackets == 0' failed.

Looking at the code for this assertion, it’s not immediately obvious what it’s intended to check for. Is anyone able to provide some context around why it’s there and what is likely to be happening by failing it?

Thanks.