I wanted to measure the cpu cycle for executing a single instruction on a Raspberry Pi 3b+, so I enabled user-state access to pmccntr as per the following code.

static inline u32 armv8pmu_pmcr_read(void)
{
    u64 val=0;
    asm volatile("mrs %0, pmcr_el0" : "=r" (val));
    return (u32)val;
}

static inline void armv8pmu_pmcr_write(u32 val)                                                      {                                                                                                    
    val &= 0x3f;
    isb();
    asm volatile("msr pmcr_el0, %0" : : "r" ((u64)val));
}

static inline void enable_cpu_counters(void* data)
{
    asm volatile("msr pmuserenr_el0, %0" : : "r"(0xf));
    armv8pmu_pmcr_write((1 << 6) | (1 << 0));
    asm volatile("msr PMCNTENSET_EL0, %0" :: "r" ((u32)(1 << 31)));
    armv8pmu_pmcr_write(armv8pmu_pmcr_read() | (1 << 0) | (1 << 6));
    asm volatile("isb");
    asm volatile("msr pmccfiltr_el0, %0" :: "r" (1 << 27));
    printk("nCPU:%d ", smp_processor_id());
}

static inline void enable_pmu_pmccntr(void)
{
    on_each_cpu(enable_cpu_counters, NULL, 1);
    printk(KERN_INFO "Enable Access PMU Initialized");
}

Also I fixed the cpu frequency to 1GHz by writing the following configuration to config.txt.

arm_freq=1000
over_voltage=4
core_freq=500
force_turbo=1

I first tested the functionality I wanted in a simple code example.

int main()
{
    u64 begin,end;
    
    begin = arch_counter_get_cntpct();
    sleep(1);
    end= arch_counter_get_cntpct();
    
    printf("The count is %llu.n",end-begin);

    return 0;
}

But its output confused me, I observed that pmccntr grows in cycles related to the value of cntfeq, when the value of cntfeq is 19.2MHz, pmccntr grows about 19.2M cycles and when the value of cntfeq is 54MHz, pmccntr grows about 54M cycles.
Shouldn’t the pmccntr frequency be the same as the cpu frequency?

Tell me why the frequency of pmccntr does not match the cpu frequency and how to fix it?