In QEMU RISCV instruction sub encoded according to RISCV spec,
where dots represent variable bits, which encode 2 source and 1 destination register indices.

sub      0100000 .....    ..... 000 ..... 0110011 

However, in Spike there are following definitions:

#define MATCH_C_SUB 0x8c01 //'0b1000110000000001'
#define MASK_C_SUB 0xfc63 //'0b1111110001100011'

How could I take QEMU-like representation and convert it to Spike’s (for example to add a new instruction)?
Thanks

I do not understand how instruction encoding represented in Spike